The CPU instruction set serves as the interface between software and the CPU. The CPU itself is essentially an “implementation” of this instruction set.
Regardless of how sophisticated the software is, in order to be executed by the CPU, it must be translated into machine code. This translation is performed by the compiler, which goes through several steps: “compilation,” “assembly,” and “linking,” resulting in the creation of an executable file. This file contains binary machine code, which the CPU can directly read and execute.
In a software context, an instruction set is a set of rules that defines how assembly language files should be formatted.
For example, consider the following x86 assembly code:
mov word ptr es:[eax + ecx * 8 + 0x11223344], 0x12345678
This shows several aspects of the instruction set’s format restrictions:
- The
movinstruction is used, but it can only have two operands. - The operand size is 16 bits (
word), despite the value0x12345678being 32-bit. - A segment override prefix is used, with the
essegment. Other valid segments includeds,cs,ss,fs, andgs, but only these can be used. - The first operand is a memory address, and the second is an immediate value. However, the memory address must follow certain rules—writing
[eax + ecx * 10 + 0x11223344]would be incorrect.
Each assembly instruction directly corresponds to a segment of machine code. The assembly instruction above could be translated by an x86 compiler into the following machine code:
26 66 c7 84 c8 44 33 22 11 78 56
If any of the conditions mentioned in points 1, 2, 3, or 4 are violated, the translation would fail.
Thus, the instruction set serves the purpose of informing programmers and compilers about the correct format for assembly, which instructions are supported, what limitations apply, what operands can be used, and how memory addresses should be structured. If any of this is incorrect, it will not be possible to translate the assembly into machine code.
The instruction set governs the structure of assembly code, and assembly can then be translated into machine code. Machine code, in turn, instructs the CPU on what to do during each clock cycle. In this sense, the CPU’s instruction set describes the functionality the CPU can perform—it is essentially a collection of “which machine codes the CPU can execute.”
Contrary to common assumptions, the CPU doesn’t need any form of storage medium to store the instruction set itself, because decoding refers to interpreting machine code according to the instruction set. The hardware implementation of decoding involves a complex network of logic gates.
Therefore, the CPU is essentially the instruction set in physical form. The instruction set defines what the CPU can do, and the CPU is the tool that performs these tasks. If you had to pinpoint a location where the CPU “stores” the instruction set in a narrow sense, it would be in the decode circuitry within the CPU.
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