Although senior executives at TSMC recently stated that the upcoming A16/A14 process nodes will not adopt ASML’s High NA EUV lithography machines—priced as high as $400 million and featuring a 0.5 numerical aperture—Intel has decided to use High NA EUV lithography for mass production on its next-generation Intel 14A process.
Meanwhile, to address manufacturing challenges below the 1nm node, ASML is actively developing Hyper NA EUV lithography machines with a 0.75 NA, representing even greater technical challenges, considering it took ASML around 20 years to bring standard EUV lithography to commercial scale.
China, which urgently needs breakthroughs in EUV lithography, has turned its attention to the EUV-FEL (EUV Free Electron Laser) technology, which is based on linear electron accelerators.
01
EUV Lithography Machines: 17 Years and $9 Billion in R&D Investment
Currently, virtually all sub-7nm process nodes globally use ASML’s EUV lithography machines for mass production. As DRAM production moves to 10nm, memory giants like Micron, Samsung, and SK Hynix are either implementing or planning to adopt EUV tools.
The previous generation 193nm immersion lithography pushed the process to around 7nm using multi-patterning (with extreme cases down to 5nm, albeit with low yields). However, multi-patterning brings two major issues: rising lithography and mask costs (each added process step increases defect probability), and longer cycle times due to added exposure, etching (ETCH), and chemical mechanical polishing (CMP) steps, leading to higher costs and reduced yield.
To solve these challenges, the most effective way is to shorten the wavelength of the light source to improve lithography resolution. Over 20 years ago, leading wafer manufacturers and ASML began focusing on EUV lithography technology with a light source wavelength of only 13.5nm.
In 1997, Intel spearheaded the creation of the EUV LLC alliance, with ASML later joining as the sole lithography equipment provider to share research results. Through acquisitions (e.g., Cymer, an excimer light source provider) and internal development, ASML introduced the conceptual EUV system NXW:3100 in 2010, but it wasn’t until the 2016 launch of the production-grade NXE:3400B that EUV truly entered mass deployment.
ASML stated that EUV development took $9 billion in R&D and 17 years of work before commercial success, and around 20 years before entering full-scale industrial use.
Compared to 193nm immersion lithography, EUV significantly enhances resolution, printing fine patterns as small as 13nm in a single exposure. It also eliminates immersion systems and ultra-pure water contact, with clear advantages in production cycle, OPC complexity, process control, and yield. The downside is the initial cost—$150 million per unit.
With strong backing from advanced process leaders like Intel, TSMC, and Samsung, and ASML’s sustained investment in EUV, plus key acquisitions and investments across its upstream EUV supply chain, ASML has remained the sole global EUV lithography supplier.
Jos Benschop, head of ASML’s research, said: “Driven by Moore’s Law, transistor length and width have shrunk 70% per generation for decades. But now the scaling factor is around 20% per node.” The most advanced High NA EUV machines can print 8nm lines, about 32 silicon atoms wide. At such close distances, quantum tunneling can cause electrons to behave unpredictably.
Benschop, involved in EUV research since the late 1990s, noted: “With the original scaling path, we’d hit 0.25nm (2.5 angstroms)—the distance between two silicon atoms—around 2065. But now it might not be until mid-next century.” So ASML will continue pushing efficiency, but how?
02
Partnering with ARCNL
According to Dutch media NRC, ASML collaborates with the Advanced Research Center for Nanolithography (ARCNL), founded 10 years ago in partnership with the University of Amsterdam. Martin van den Brink, ASML’s former CTO and co-president (now retired), helped launch it. ASML funds about one-third of ARCNL’s €12 million annual budget, enabling 80 scientists to explore advanced lithography modules.
ARCNL’s mission is to improve EUV and study alternatives in case EUV fails. Director Wim van der Zande, previously of ASML R&D, highlights the ecosystem, which includes collaborations with ASML researchers in Veldhoven and San Diego, and with universities worldwide.
ARCNL scientists know ASML’s main challenge: economic feasibility. Machines that don’t generate profit won’t be adopted. ASML invests over €4 billion annually in research, far surpassing other Dutch firms, and while it could integrate ARCNL, this risks harming academic openness.
“Scientists may spend years on a study, while industry may cancel projects abruptly,” Van der Zande said. Still, about 75% of ARCNL PhDs go on to work at ASML.
03
Shorter Wavelength Light Sources
In 1984, ASML used mercury lamps with wavelengths of 365 or 436nm, then 248nm and 193nm lasers. Now EUV uses 13.5nm. Researchers are exploring 6.7nm and 4.4nm sources. Some elements like lanthanum and boron can provide transparency and reflectivity for 6.7nm. The downside: poorer reflectivity.
ARCNL is building a gadolinium-based setup to generate 6.7nm light. But shorter wavelengths increase risk of error due to fewer photons—technical term: stochastic noise. “Overall, the chance of success with shorter wavelengths is small,” said Benschop.
04
Larger Numerical Aperture
Beyond wavelength, resolution also improves via higher numerical aperture (NA). Current EUV systems have 0.33 NA, while High NA EUV reaches 0.5. Zeiss, ASML’s lens partner, had to use mirrors over 1 meter in diameter and develop ultra-precise measurement tools to reduce lens error to atomic levels.
(ASML already acquired 24.9% of Carl Zeiss SMT in 2016 to enhance their cooperation.)
High NA EUV requires adjustments: smaller field of view, thus larger chips must be split and stitched; shallow depth of focus requiring ultra-thin (under 20nm) and chemically modified photoresists; extremely flat wafers to prevent deviations.
ASML and Zeiss are also working on Hyper NA EUV (0.75 NA). “You can place the final mirror closer to the wafer to mimic larger optics,” Benschop noted. Downside: more light reflects back, complicating the optics.
Hyper NA’s larger NA handles more light—like a wide-neck bottle empties faster—so it offers better resolution and speed.
According to Martin van den Brink’s roadmap, standard 0.33 NA EUV can support 2nm by 2025, 1.4nm by 2027 (with multi-patterning). High NA (0.55 NA) extends to 1nm by 2029, and possibly 0.5nm by 2033 with multi-patterning.
To go further may require Hyper NA, which might support sub-0.2nm (2 angstroms) nodes—but it’s uncertain. ASML may release Hyper NA machines around 2030.
It’s important to note that “process nodes” like 2 angstroms refer to effective, not physical, dimensions. A 2Å node corresponds to 12–16nm metal pitch, and only below 2Å does pitch reach 10–14nm. Thus, true 0.25nm spacing may not arrive until mid-century.
05
Higher EUV Power, Lower Energy Use
ASML’s EUV source is a laser-produced plasma (LPP): Trumpf’s 30kW CO₂ laser hits 50,000 tin droplets per second (100,000 pulses/sec), vaporizing them into plasma. EUV light at 13.5nm is emitted via high-charge tin ion transitions, then reflected and focused onto photoresist.
Due to air absorption of EUV, the whole system runs in vacuum. Glass lenses don’t work for EUV; special molybdenum-silicon mirrors from Zeiss are used, losing ~30% energy per reflection. With six mirrors, only ~1% of the original EUV light reaches the wafer.
In 2015, ASML achieved 100W EUV power; the system consumed 15,000kW. Today, they’ve reached 500W, aiming for 1000W, while cutting energy use. By 2033, ASML aims to reduce energy per wafer exposure by 80% compared to 2018.
Plans include increasing tin droplet rate to 60,000/sec, and switching from CO₂ to solid-state lasers for greater efficiency, as suggested by ARCNL.
06
Layered “Sandwich” Mirrors
EUV mirrors use alternating silicon and molybdenum layers—about 70 multilayers in total. Each layer is under 3% thick.
Professor Marcelo Ackermann of XUV Optics reported up to 71% reflectivity—close to the theoretical 75%. Built on Professor Fred Bijkerk’s early 1990s work, these “sandwich” mirrors use microwave sputtering to tightly layer films only 10nm thick. Layers are now more precisely separated, improving output.
Ackermann’s lab, with ARCNL, also found solutions for EUV-level blistering by adding secret extra materials.
07
Larger, Faster Masks
High NA EUV uses mirrors to differently scale chip patterns along X/Y axes, which slows pattern writing. ASML wants to compensate by increasing speed. The mask stage now accelerates at 32G (32× gravity), and could go even faster.
Large AI chips—containing hundreds of billions of transistors and many cores—are too big to fit in a single High NA EUV mask field. So, they’re currently made in parts and stitched via advanced packaging—a workable but inconvenient method.
If chipmakers agree, ASML could adopt larger masks to “paint” full chips again—but Intel and TSMC must convince the mask supply chain.
08
More Measurements
EUV can write nanostructures and measure them. ARCNL’s Professor Stefan Witte studies how ultra-short light pulses generate harmonics (based on Anne L’Huillier’s Nobel-winning discovery) to measure wafer quality even mid-production.
Researcher Peter Kraus shows setups recording how chip materials scatter EUV at various angles, detecting 5–10nm structures—beyond traditional optics.
ARCNL also explores photoacoustics: short laser pulses create sound waves to “see” chip layers. As structures shrink and go 3D, such data grows vital.
09
Alternative Tech: EUV-FEL
ASML’s current LPP source uses 30kW lasers firing 100,000x/sec at tin droplets. But as processes advance, LPP faces challenges.
As an alternative, researchers in the U.S., China, Japan, and others are studying EUV-FEL (Free Electron Laser) sources based on linear accelerators. FELs can emit any wavelength light, and power enough for 10–20 EUV tools—cutting cost and sidestepping ASML’s LPP monopoly.
ASML studied FEL around 2015 and confirmed its viability but found it unsuitable: particle accelerators are building-sized and impractical for fabs. If the FEL fails, all connected lines (10–20) stop, an unacceptable risk for most chipmakers.
Still, U.S. startup Xlight plans to link an FEL prototype with an ASML machine by 2028.
Jos Benschop insists LPP is the most cost-effective EUV source—especially with rising efficiency.
For China, under U.S. and Dutch export bans, cost isn’t the primary concern. EUV-FEL may better fit its needs, with feasibility already verified by ASML.
“Innovation leadership is complex,” said Martin van den Brink in a 2015 NRC interview. “We started as followers. You could just follow the taillights ahead. But once you pass competitors, you must choose your own path.”
Source: ARCNL, ASML
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