Discover Samsung 2025 Roadmap for Memory Advancements

As a latecomer in the HBM and enterprise SSD sectors, Samsung is determined to consolidate its leadership through new technologies.

Samsung Electronics plans to release 400-layer vertical NAND chips in 2026 to lead the rapidly growing storage device market driven by the AI boom.

This represents Samsung’s latest roadmap for maximizing capacity and performance.

Currently, Samsung is mass-producing 286-layer, high-capacity V9 NAND chips.

In existing NAND chips, storage cells are located atop peripheral devices, which house the internal components of the chip.

However, with 300 layers or more, cells often damage peripheral devices.

With advanced 10th-generation V NAND (V10), Samsung plans to apply an innovative bonding technique, which involves creating cells and peripheral devices on separate wafers and then bonding them together.

Samsung states that this method will enable ultra-high NAND stacks with large storage capacity and excellent SSD performance, ideal for ultra-high-capacity SSDs in AI data centers.

This chip is referred to as Bonded Vertical NAND Flash, or BV NAND, and is considered a dream NAND for artificial intelligence.

In 2013, Samsung pioneered V NAND chips, introducing vertical storage cells, with BV NAND increasing unit density by 1.6 times.

Samsung plans to release V11 NAND in 2027, increasing data input and output by 50%.

It also plans to launch an SSD subscription service aimed at tech companies looking to manage costly AI semiconductor infrastructure.

By 2030, NAND chips will exceed 1,000 layers.

Samsung has committed to solidifying its leading position in the high-capacity, high-performance NAND market.

The competition in NAND-based storage devices is intense, as AI chips require massive storage to store and process images and videos for core inferencing.

Data shows that as of the second quarter, Samsung is already a leader in the NAND sector, controlling over 35% of the global market.

To strengthen its lead in DRAM, Samsung plans to release sixth-generation 10nm DRAM (1c DRAM) and seventh-generation 10nm DRAM (1d DRAM) as early as the end of 2024 for advanced AI chips such as HBM4.

According to Samsung’s memory roadmap, it plans to launch sub-10nm DRAM, or 0a DRAM, by 2027.

The key feature of 0a DRAM is the application of a vertical channel transistor (VCT) 3D structure, similar to the technology used in NAND flash, to enhance performance and stability.

By vertically stacking cells, VCT DRAM can reduce interference between cells and increase capacity.

Samsung also plans to accelerate the development of AI-specific memory products beyond HBM, such as low-power memory processing (LP-PIM).

Market research indicates that the global storage market size is projected to grow from $92 billion in 2024 to $227 billion by 2026.

Samsung expects the server DRAM and enterprise SSD markets to grow annually by 27% and 35%, respectively, from 2024 to 2029.

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