IDTechEx predicts that from 2025 to 2030, the market revenue will exceed $400 billion.
Frontier AI has attracted hundreds of billions of dollars in global investment, with governments and hyperscale companies competing to take the lead in fields such as drug discovery and autonomous infrastructure. Graphics Processing Units (GPUs) and other AI chips have played an important role in driving the development of AI, providing the necessary computational power for deep learning within data centers and cloud infrastructure. GPUs play a key role in delivering computational power and are the dominant undercurrent in the wave of large language models (LLMs) and generative AI. However, with the demand for more efficient computation, lower costs, higher performance, scalable systems, faster inference, and domain-specific computing, other AI chips are increasingly gaining popularity.
As the prospects for AI chips go beyond GPUs and new architectures achieve large-scale commercialization, IDTechEx’s report, “AI Chips for Data Centers and Cloud 2025-2035: Technology, Market, Forecast,” provides an independent analysis of the AI chip market for data centers and the cloud.
01
Graphics Processing Units (GPUs)
The largest AI systems are large-scale horizontally scaled HPC and AI systems that extensively implement GPUs. These are often hyperscale AI data centers and supercomputers, which can deliver exaFLOPS performance locally or over distributed networks. In recent years, NVIDIA’s Hopper (H100/H200) chips and the recently released Blackwell (B200/B300) chips have achieved significant success. AMD has also developed competitive chips with its MI300 series processors (MI300X/MI325X). These high-performance GPUs continue to adopt cutting-edge semiconductor technologies. One example is increasing on-chip memory capacity, with top-tier chips having more than 250GB of high-bandwidth memory (HBM), enabling larger AI models with more parameters to run on these GPUs. These chips also adopt advanced semiconductor packaging solutions, such as TSMC’s CoWoS-L packaging, small chips, multi-chip GPUs, and the latest process nodes (5nm and below).
02
Custom AI Chips Used by Hyperscale Companies and Cloud Service Providers
GPUs have been the foundation for training AI models but face some limitations, such as high total cost of ownership (TCO), vendor lock-in risks, and potentially excessive power for specific inference workloads. An emerging strategy adopted by hyperscale companies is the use of custom AI ASICs based on pulse array technology. These have cores built specifically for AI workloads, cost less, and are dedicated to specific systems (e.g., transformers, recommendation systems, etc.), offering efficient inference and providing hyperscale providers and CSPs with the opportunity for full-stack control and differentiation without sacrificing performance.
03
Other AI Chips
Other AI chips are being commercialized to disrupt GPUs, featuring similar and novel computational architectures. Some large chip suppliers, such as Intel and Qualcomm, have designed AI accelerators (e.g., Gaudi, Cloud AI 100), using heterogeneous arrays of compute units (similar to GPUs), but built specifically to accelerate AI workloads. These solutions offer a balance between performance, energy efficiency, and flexibility for specific application domains. Typically, these chips include matrix engines and tensor cores designed to perform intensive linear algebra operations, such as GEMM (general matrix multiplication) and BMM (batch matrix multiplication), with high throughput.
Startups focusing on AI chips often take a different approach, deploying cutting-edge architectures and manufacturing technologies, such as dataflow control processors, wafer-level packaging, spatial AI accelerators, Processing-in-Memory (PIM) technology, and coarse-grained reconfigurable arrays (CGRA). Many companies have successfully launched these systems for data centers and cloud computing (Cerebras, Groq, Graphcore, SambaNova, Untether AI, etc.), typically developing rack-level solutions for easier deployment by enterprises or providing them on their own cloud platforms. These systems perform exceptionally well, especially in scale-out environments.
04
AI Chip Design and Supply Chain
Developing competitive AI chips with training (training time) and inference (tokens per second), high energy efficiency (TOPS/watt), and related software support is a significant challenge faced by all chip designers. This process involves fine-tuning many steps, including selecting programming and execution models, designing optimized hardware and memory architectures, and manufacturing using advanced process nodes and advanced semiconductor packaging. For example, data center chips are adopting the latest process nodes from TSMC, Intel Foundry, and Samsung Foundry, using ASML’s EUV (extreme ultraviolet) lithography technology. These foundries are transitioning transistor technology from 5nm nodes using FinFET (Fin Field Effect Transistor) to sub-2nm nodes using GAAFETs (Gate-All-Around FETs) with backside power delivery.
The various technologies involved in design and manufacturing provide broad opportunities for future technological innovations across the entire semiconductor industry supply chain. Government policies and significant investments indicate a widespread interest in advancing frontier AI to new heights, which will require a large number of AI chips in AI data centers to meet this demand. IDTechEx forecasts that from 2025 to 2030, the market will grow at a compound annual growth rate (CAGR) of 14%, with revenue surpassing $400 billion.
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