The JEDEC Solid State Technology Association, a global leader in microelectronics industry standards development, has announced upcoming standards for advanced memory modules designed to support next-generation high-performance computing and AI applications.
JEDEC announced key details of the upcoming DDR5 Multiplexed Dual Inline Inline Memory Module (MRDIMM) and next-generation LPDDR6 Compression Attached Memory Module (CAMM) standards.
The new MRDIMMs and LPDDR6 CAMMs will revolutionize the industry with unmatched bandwidth and memory capacity.
DDR5 MRDIMMs offer innovative and efficient new module designs to increase data transfer rates and overall system performance.
Multiplexing allows multiple data signals to be combined and transmitted through a single channel, effectively increasing bandwidth without additional physical connections and providing seamless bandwidth upgrades that enable applications to exceed DDR5 RDIMM data rates.
Other planned features include:
Platform compatibility with RDIMMs for flexible end-user bandwidth configurations
Leverages standard DDR5 DIMM components (including DRAM, DIMM form factor and pin distribution, SPD, PMIC and TS) for easy adoption
Leverages RCD/DB logic processing power for efficient I/O expansion
Leverages existing LRDIMM ecosystem for design and test infrastructure
Supports multi-generation scaling to DDR5-EOL
The JEDEC MRDIMM standard is designed to deliver up to twice the peak bandwidth of native DRAM, enabling applications to exceed current data rates and achieve new levels of performance.
It maintains the same capacity, reliability, availability, and maintainability (RAS) characteristics as JEDEC RDIMM.
The committee’s goal is to double the bandwidth to 12.8 Gbps and increase pin speeds.
MRDIMMs are expected to support more than two classes and are being designed to use standard DDR5 DIMM components to ensure compatibility with legacy RDIMM systems.
Plans are underway for a high MRDIMM form factor to provide higher bandwidth and capacity without requiring changes to the DRAM package.
This innovative, higher form factor will double the number of DRAM single chip packages mounted on the DIMM, eliminating the need for a 3DS package.
As a successor to JEDEC’s JESD318 CAMM2 memory module standard, JC-45 is developing a next-generation CAMM module for LPDDR6, targeting maximum speeds of more than 14.4 GT/s.
It is planned that the module will also be available with 24-bit subchannels, 48-bit channels and connector arrays.
Related:
Disclaimer:
- This channel does not make any representations or warranties regarding the availability, accuracy, timeliness, effectiveness, or completeness of any information posted. It hereby disclaims any liability or consequences arising from the use of the information.
- This channel is non-commercial and non-profit. The re-posted content does not signify endorsement of its views or responsibility for its authenticity. It does not intend to constitute any other guidance. This channel is not liable for any inaccuracies or errors in the re-posted or published information, directly or indirectly.
- Some data, materials, text, images, etc., used in this channel are sourced from the internet, and all reposts are duly credited to their sources. If you discover any work that infringes on your intellectual property rights or personal legal interests, please contact us, and we will promptly modify or remove it.