With Ventana’s 192-core Veryon V2 set to debut in 2024, the era of mature RISC-V data center CPUs is imminent. Established in 2018, Ventana claims that the Veryon V2 surpasses AMD’s Genoa and Bergamo Epyc CPUs. However, the company anticipates greater success with its specific domain accelerator (or DSA) chipset. Ventana predicts that the DSA chipset will bring about significant performance enhancements compared to regular CPUs.
RISC-V is an open standard CPU architecture utilized in various applications but is only just emerging in servers now. Veryon V2 will be Ventana’s first server CPU released into the market, as Veryon V1 seems to have been canceled or skipped.
In comparison to V1, each chip in V2 has more cores and a high-speed cache, utilizing TSMC’s slightly newer 4nm node instead of the 5nm node and adopting standard RISC-V RVA23 vector instructions, as Ventana initially planned to use their instructions. However, Ventana hopes its CPU adheres to RISC-V standards to enhance hardware and software compatibility. For this reason, it has also added RISC-V Software Ecosystem (or RISE) support for V2.
Veyron V2 draws inspiration from AMD’s server CPUs, employing a design featuring small chips with I/O hublets and compute small chips containing CPU cores. Nonetheless, Ventana also offers small DSA chips that can accelerate specific workloads, claiming to provide higher performance than traditional CPUs without hardware acceleration. Additionally, the I/O hublets can be customized via hardware acceleration, a feature AMD does not provide.
Ventana asserts that its CPU design approach utilizing small chips and DSA hardware will reduce development time to under a year, lower costs to below $25 million, and require half the quantity compared to x86 or ARM CPUs to reach the level of Veryon V2.
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